The formula can be written in two equivalent forms:
\[ C_L = \frac{C_1 \times C_2}{C_1 + C_2} + C_s \] \[ C_L = \frac{1}{\displaystyle \frac{1}{C_1} + \frac{1}{C_2}} + C_s \]
In the typical case where \(C_1 = C_2\), the formula simplifies to:
\[ C_L = \frac{C}{2} + C_s \]
Rearranging to solve for the external load capacitors (\(C = C_1 = C_2\)):
\[ C = 2(C_L - C_s) \]
\[ C_L = \frac{C_1 \times C_2}{C_1 + C_2} + C_s \] \[ C_L = \frac{1}{\displaystyle \frac{1}{C_1} + \frac{1}{C_2}} + C_s \]
In the typical case where \(C_1 = C_2\), the formula simplifies to:
\[ C_L = \frac{C}{2} + C_s \]
Rearranging to solve for the external load capacitors (\(C = C_1 = C_2\)):
\[ C = 2(C_L - C_s) \]
PCB stray capacitance is typically caused by traces, pads, and parasitics, and is usually
estimated at 3–5 pF.